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metal : Q6_K implementation (#1752)
* Metal implementation for Q4_K Very slow for now: 42 ms / token, Q4_0 runs in 28 ms/token on my 30-core M2 Max GPU. * Optimizing Q4_K on metal The first token always takes longer, I guess because the metal kernel is being jit-compiled. So, using n = 128 to measure time. At this point Q4_K takes 29.5 ms / token compared to 27.2 ms / token for Q4_0. Quite a bit better than the initial attempt, but still not good enough. * Optimizing q4_K metal dot some more For n = 256 it is now 28.1 ms/token compared to 27 ms/token for q4_0. * Fix after merge with master * Metal implementation for Q6_K Similar to the CUDA implementation. No idea if this is the optimum for Metal, but the few alternative variants I tried all had a lower performance. We get 36.5 ms / token on M2 Max with 30 GPU cores. This corresponds to ~200 GB/second throughput. * clang-tidy : add config back * Much better Q6_K implementation for metal 28.3 ms / token for 7B. Subtracting ~9 ms that is spent in other compute graph operations, we are left with ~19 ms for the matrix multiplications. The model is ~5.5 GB, so we are getting 1000 / 19 * 5.5 = 290 GB/s! --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
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2 changed files with 187 additions and 7 deletions
17
ggml-metal.m
17
ggml-metal.m
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@ -50,10 +50,12 @@ struct ggml_metal_context {
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GGML_METAL_DECL_KERNEL(get_rows_f16);
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GGML_METAL_DECL_KERNEL(get_rows_q4_0);
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GGML_METAL_DECL_KERNEL(get_rows_q4_k);
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GGML_METAL_DECL_KERNEL(get_rows_q6_k);
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GGML_METAL_DECL_KERNEL(rms_norm);
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GGML_METAL_DECL_KERNEL(mul_mat_f16_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_q4_0_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_q4_k_f32);
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GGML_METAL_DECL_KERNEL(mul_mat_q6_k_f32);
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GGML_METAL_DECL_KERNEL(rope);
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GGML_METAL_DECL_KERNEL(cpy_f32_f16);
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GGML_METAL_DECL_KERNEL(cpy_f32_f32);
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@ -136,10 +138,12 @@ struct ggml_metal_context * ggml_metal_init(void) {
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GGML_METAL_ADD_KERNEL(get_rows_f16);
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GGML_METAL_ADD_KERNEL(get_rows_q4_0);
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GGML_METAL_ADD_KERNEL(get_rows_q4_k);
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GGML_METAL_ADD_KERNEL(get_rows_q6_k);
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GGML_METAL_ADD_KERNEL(rms_norm);
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GGML_METAL_ADD_KERNEL(mul_mat_f16_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_q4_0_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_q4_k_f32);
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GGML_METAL_ADD_KERNEL(mul_mat_q6_k_f32);
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GGML_METAL_ADD_KERNEL(rope);
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GGML_METAL_ADD_KERNEL(cpy_f32_f16);
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GGML_METAL_ADD_KERNEL(cpy_f32_f32);
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@ -530,6 +534,15 @@ void ggml_metal_graph_compute(
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nth1 = 16;
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_q4_k_f32];
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} break;
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case GGML_TYPE_Q6_K:
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{
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GGML_ASSERT(ne02 == 1);
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GGML_ASSERT(ne12 == 1);
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nth0 = 4;
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nth1 = 16;
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[encoder setComputePipelineState:ctx->pipeline_mul_mat_q6_k_f32];
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} break;
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default:
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{
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fprintf(stderr, "Asserting on type %d\n",(int)src0t);
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@ -560,6 +573,9 @@ void ggml_metal_graph_compute(
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} else if (src0t == GGML_TYPE_Q4_K) {
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[encoder setThreadgroupMemoryLength:nth0*nth1*sizeof(float) atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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} else if (src0t == GGML_TYPE_Q6_K) {
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[encoder setThreadgroupMemoryLength:nth0*nth1*sizeof(float) atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ne11, 1) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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} else {
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[encoder setThreadgroupMemoryLength:nth0*sizeof(float) atIndex:0];
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[encoder dispatchThreadgroups:MTLSizeMake(ne01, ne11, ne12) threadsPerThreadgroup:MTLSizeMake(nth0, nth1, 1)];
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@ -576,6 +592,7 @@ void ggml_metal_graph_compute(
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case GGML_TYPE_F16: [encoder setComputePipelineState:ctx->pipeline_get_rows_f16]; break;
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case GGML_TYPE_Q4_0: [encoder setComputePipelineState:ctx->pipeline_get_rows_q4_0]; break;
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case GGML_TYPE_Q4_K: [encoder setComputePipelineState:ctx->pipeline_get_rows_q4_k]; break;
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case GGML_TYPE_Q6_K: [encoder setComputePipelineState:ctx->pipeline_get_rows_q6_k]; break;
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default: GGML_ASSERT(false && "not implemented");
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}
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177
ggml-metal.metal
177
ggml-metal.metal
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@ -303,18 +303,37 @@ kernel void kernel_mul_mat_q4_0_f32(
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sum[ith] += acc*d;
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}
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// accumulate the sum from all threads in the threadgroup
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//
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// Accumulate the sum from all threads in the threadgroup
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// This version is slightly faster than the commented out one below,
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// which I copy-pasted from ggerganov's q4_0 dot product for metal.
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//
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = nth/2; i > 0; i /= 2) {
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if (ith < i) {
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sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%4 == 0) {
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for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%16 == 0) {
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for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith == 0) {
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for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
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dst[r1*ne0 + r0] = sum[0];
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}
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//// accumulate the sum from all threads in the threadgroup
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//threadgroup_barrier(mem_flags::mem_threadgroup);
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//for (uint i = nth/2; i > 0; i /= 2) {
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// if (ith < i) {
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// sum[ith] += sum[ith + i];
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// }
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// threadgroup_barrier(mem_flags::mem_threadgroup);
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//}
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//if (ith == 0) {
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// dst[r1*ne0 + r0] = sum[0];
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//}
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}
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kernel void kernel_mul_mat_f16_f32(
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@ -515,6 +534,13 @@ typedef struct {
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uint8_t qs[QK_K/2]; // 4--bit quants
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} block_q4_k;
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typedef struct {
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uint8_t ql[QK_K/2]; // quants, lower 4 bits
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uint8_t qh[QK_K/4]; // quants, upper 2 bits
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int8_t scales[QK_K/16]; // scales, quantized with 8 bits
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half d; // super-block scale
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} block_q6_k;
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static inline uchar4 get_scale_min_k4(int j, device const uint8_t * q) {
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uchar4 r;
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if (j < 4) {
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@ -554,6 +580,38 @@ static void dequantize_row_q4_k(device const block_q4_k * x, device float * y, i
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}
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}
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static void dequantize_row_q6_k(device const block_q6_k * x, device float * y, int k) {
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assert(k % QK_K == 0);
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const int nb = k / QK_K;
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for (int i = 0; i < nb; i++) {
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const float d = x[i].d;
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device const uint8_t * ql = x[i].ql;
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device const uint8_t * qh = x[i].qh;
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device const int8_t * sc = x[i].scales;
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for (int n = 0; n < QK_K; n += 128) {
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for (int l = 0; l < 32; ++l) {
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int is = l/16;
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const int8_t q1 = (int8_t)((ql[l + 0] & 0xF) | (((qh[l] >> 0) & 3) << 4)) - 32;
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const int8_t q2 = (int8_t)((ql[l + 32] & 0xF) | (((qh[l] >> 2) & 3) << 4)) - 32;
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const int8_t q3 = (int8_t)((ql[l + 0] >> 4) | (((qh[l] >> 4) & 3) << 4)) - 32;
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const int8_t q4 = (int8_t)((ql[l + 32] >> 4) | (((qh[l] >> 6) & 3) << 4)) - 32;
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y[l + 0] = d * sc[is + 0] * q1;
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y[l + 32] = d * sc[is + 2] * q2;
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y[l + 64] = d * sc[is + 4] * q3;
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y[l + 96] = d * sc[is + 6] * q4;
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}
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y += 128;
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ql += 64;
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qh += 32;
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sc += 8;
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}
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}
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}
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kernel void kernel_get_rows_q4_k(
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device const void * src0,
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device const int * src1,
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@ -665,3 +723,108 @@ kernel void kernel_mul_mat_q4_k_f32(
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// dst[r1*ne0 + r0] = sum[0];
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//}
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}
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kernel void kernel_get_rows_q6_k(
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device const void * src0,
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device const int * src1,
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device float * dst,
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constant int64_t & ne00,
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constant uint64_t & nb01,
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constant uint64_t & nb1,
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uint tpig[[thread_position_in_grid]]) {
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const int i = tpig;
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const int r = ((device int32_t *) src1)[i];
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dequantize_row_q6_k(
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(device const block_q6_k *) ((device char *) src0 + r*nb01),
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(device float *) ((device char *) dst + i*nb1), ne00);
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}
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kernel void kernel_mul_mat_q6_k_f32(
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device const void * src0,
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device const float * src1,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant int64_t & ne10,
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constant int64_t & ne11,
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constant uint64_t & nb10,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant int64_t & ne0,
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constant int64_t & ne1,
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threadgroup float * sum [[threadgroup(0)]],
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uint2 tgpig[[threadgroup_position_in_grid]],
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uint2 tpig[[thread_position_in_grid]], // we don't use this for now
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uint2 tpitg[[thread_position_in_threadgroup]],
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uint2 tptg[[threads_per_threadgroup]]) {
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const uint8_t kmask1 = 0x03;
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const uint8_t kmask2 = 0x0C;
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const uint8_t kmask3 = 0x30;
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const uint8_t kmask4 = 0xC0;
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const int nb = ne00/QK_K;
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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device const block_q6_k * x = (device const block_q6_k *) src0 + r0*nb;
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device const float * yy = (device const float *) src1 + r1*ne10;
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const uint nth = tptg.x*tptg.y;
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const uint ith = tptg.y*tpitg.x + tpitg.y;
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const int step = QK_K / tptg.y; // we expect this to be 16
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const int iqs = step * tpitg.y; // 0...240 in steps of 16
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const int ip = iqs / 128; // 0 or 1
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const int il = (iqs - 128*ip)/16; // 0...7
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const int n = 4;
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const int is = 8*ip + (n*il)/16;
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float sumf = 0;
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for (int i = tpitg.x; i < nb; i += tptg.x) {
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device const uint8_t * ql = x[i].ql + 64*ip + n*il;
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device const uint8_t * qh = x[i].qh + 32*ip + n*il;
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device const int8_t * sc = x[i].scales + is;
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device const float * y = yy + i * QK_K + 128*ip + n*il;
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const float dall = x[i].d;
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float4 sums = {0.f, 0.f, 0.f, 0.f};
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for (int l = 0; l < n; ++l) {
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sums[0] += y[l+ 0] * ((int8_t)((ql[l+ 0] & 0xF) | ((qh[l] & kmask1) << 4)) - 32);
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sums[1] += y[l+32] * ((int8_t)((ql[l+32] & 0xF) | ((qh[l] & kmask2) << 2)) - 32);
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sums[2] += y[l+64] * ((int8_t)((ql[l+ 0] >> 4) | ((qh[l] & kmask3) << 0)) - 32);
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sums[3] += y[l+96] * ((int8_t)((ql[l+32] >> 4) | ((qh[l] & kmask4) >> 2)) - 32);
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}
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sumf += dall * (sums[0] * sc[0] + sums[1] * sc[2] + sums[2] * sc[4] + sums[3] * sc[6]);
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}
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sum[ith] = sumf;
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//
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// Accumulate the sum from all threads in the threadgroup
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//
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%4 == 0) {
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for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith%16 == 0) {
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for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (ith == 0) {
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for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
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dst[r1*ne0 + r0] = sum[0];
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}
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}
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