2023-06-04 20:34:30 +00:00
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#include <metal_stdlib>
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using namespace metal;
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#define MAX(x, y) ((x) > (y) ? (x) : (y))
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#define QK4_0 32
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#define QR4_0 2
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typedef struct {
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half d; // delta
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uint8_t qs[QK4_0 / 2]; // nibbles / quants
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} block_q4_0;
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static void dequantize_row_q4_0(device const block_q4_0 * x, device float * y, int k) {
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const int qk = QK4_0;
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assert(k % qk == 0);
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const int nb = k / qk;
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for (int i = 0; i < nb; i++) {
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const half d = x[i].d;
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for (int j = 0; j < qk/2; ++j) {
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const int x0 = (x[i].qs[j] & 0x0F) - 8;
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const int x1 = (x[i].qs[j] >> 4) - 8;
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y[i*qk + j + 0 ] = x0*d;
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y[i*qk + j + qk/2] = x1*d;
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}
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}
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}
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kernel void kernel_add(
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device const float * src0,
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device const float * src1,
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device float * dst,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] + src1[tpig];
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}
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kernel void kernel_mul(
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device const float * src0,
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device const float * src1,
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device float * dst,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] * src1[tpig];
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}
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// assumption: src1 is a row
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// broadcast src1 into src0
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kernel void kernel_mul_row(
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device const float * src0,
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device const float * src1,
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device float * dst,
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constant int64_t & ne00,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] * src1[tpig % ne00];
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}
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kernel void kernel_scale(
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device const float * src0,
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device float * dst,
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constant float & scale,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = src0[tpig] * scale;
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}
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kernel void kernel_silu(
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device const float * src0,
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device float * dst,
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uint tpig[[thread_position_in_grid]]) {
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float x = src0[tpig];
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dst[tpig] = x / (1.0f + exp(-x));
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}
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kernel void kernel_relu(
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device const float * src0,
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device float * dst,
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uint tpig[[thread_position_in_grid]]) {
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dst[tpig] = max(0.0f, src0[tpig]);
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}
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kernel void kernel_soft_max(
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device const float * src0,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int64_t & ne02,
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threadgroup float * buf [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]) {
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const int64_t i03 = tgpig[2];
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const int64_t i02 = tgpig[1];
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const int64_t i01 = tgpig[0];
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device const float * psrc0 = src0 + i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
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device float * pdst = dst + i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
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// parallel max
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buf[tpitg[0]] = -INFINITY;
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for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
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buf[tpitg[0]] = MAX(buf[tpitg[0]], psrc0[i00]);
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}
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// reduce
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = ntg[0]/2; i > 0; i /= 2) {
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if (tpitg[0] < i) {
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buf[tpitg[0]] = MAX(buf[tpitg[0]], buf[tpitg[0] + i]);
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg[0] == 0) {
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buf[0] = buf[0];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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const float max = buf[0];
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// parallel sum
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buf[tpitg[0]] = 0.0f;
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for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
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buf[tpitg[0]] += exp(psrc0[i00] - max);
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}
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// reduce
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = ntg[0]/2; i > 0; i /= 2) {
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if (tpitg[0] < i) {
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buf[tpitg[0]] += buf[tpitg[0] + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg[0] == 0) {
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buf[0] = buf[0];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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const float sum = buf[0];
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for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
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pdst[i00] = exp(psrc0[i00] - max) / sum;
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}
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}
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kernel void kernel_diag_mask_inf(
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device const float * src0,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int & n_past,
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uint3 tpig[[thread_position_in_grid]]) {
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const int64_t i02 = tpig[2];
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const int64_t i01 = tpig[1];
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const int64_t i00 = tpig[0];
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if (i00 > n_past + i01) {
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dst[i02*ne01*ne00 + i01*ne00 + i00] = -INFINITY;
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} else {
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dst[i02*ne01*ne00 + i01*ne00 + i00] = src0[i02*ne01*ne00 + i01*ne00 + i00];
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}
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}
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2023-06-06 17:16:57 +00:00
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kernel void kernel_get_rows_f16(
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device const void * src0,
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device const int * src1,
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device float * dst,
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constant int64_t & ne00,
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constant uint64_t & nb01,
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constant uint64_t & nb1,
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uint tpig[[thread_position_in_grid]]) {
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const int i = tpig;
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const int r = ((device int32_t *) src1)[i];
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for (int j = 0; j < ne00; j++) {
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dst[i*nb1 + j] = ((device half *) ((device char *) src0 + r*nb01))[j];
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}
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}
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2023-06-04 20:34:30 +00:00
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kernel void kernel_get_rows_q4_0(
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device const void * src0,
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device const int * src1,
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device float * dst,
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constant int64_t & ne00,
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constant uint64_t & nb01,
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constant uint64_t & nb1,
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uint tpig[[thread_position_in_grid]]) {
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const int i = tpig;
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const int r = ((device int32_t *) src1)[i];
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dequantize_row_q4_0(
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(device const block_q4_0 *) ((device char *) src0 + r*nb01),
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(device float *) ((device char *) dst + i*nb1), ne00);
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}
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kernel void kernel_rms_norm(
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device const void * src0,
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device float * dst,
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constant int64_t & ne00,
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constant uint64_t & nb01,
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constant float & eps,
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threadgroup float * sum [[threadgroup(0)]],
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uint tgpig[[threadgroup_position_in_grid]],
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uint tpitg[[thread_position_in_threadgroup]],
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uint ntg[[threads_per_threadgroup]]) {
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device const float * x = (device const float *) ((device const char *) src0 + tgpig*nb01);
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// parallel sum
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sum[tpitg] = 0.0f;
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for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
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sum[tpitg] += x[i00] * x[i00];
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}
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// reduce
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = ntg/2; i > 0; i /= 2) {
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if (tpitg < i) {
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sum[tpitg] += sum[tpitg + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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// broadcast
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if (tpitg == 0) {
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sum[0] /= ne00;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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const float mean = sum[0];
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const float scale = 1.0f/sqrt(mean + eps);
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device float * y = dst + tgpig*ne00;
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for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
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y[i00] = x[i00] * scale;
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}
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}
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kernel void kernel_mul_mat_q4_0_f32(
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device const void * src0,
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device const float * src1,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant int64_t & ne10,
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constant int64_t & ne11,
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constant uint64_t & nb10,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant int64_t & ne0,
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constant int64_t & ne1,
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threadgroup float * sum [[threadgroup(0)]],
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uint2 tgpig[[threadgroup_position_in_grid]],
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uint2 tpig[[thread_position_in_grid]],
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uint2 tpitg[[thread_position_in_threadgroup]],
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uint2 tptg[[threads_per_threadgroup]]) {
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const int nb = ne00/QK4_0;
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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device const block_q4_0 * x = (device const block_q4_0 *) src0 + r0*nb;
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device const float * y = (device const float *) src1 + r1*ne10;
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const uint nth = tptg.x*tptg.y;
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const uint ith = tptg.y*tpitg.x + tpitg.y;
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sum[ith] = 0.0f;
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for (int i = tpitg.x; i < nb; i += tptg.x) {
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device const uchar4 * x0p = (device const uchar4 *) (x + i)->qs;
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device const float4 * y0p = (device const float4 *) (y + i*QK4_0);
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const float d = (float)((x + i)->d);
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const uchar4 x0v = *(x0p + tpitg.y);
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const float4 y0v = *(y0p + tpitg.y + 0);
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const float4 y1v = *(y0p + tpitg.y + 4);
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float acc = 0.0f;
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for (int j = 0; j < 4; ++j) {
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const int x0 = x0v[j] & 0x0F;
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const int x1 = x0v[j] >> 4;
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const float y0 = y0v[j];
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const float y1 = y1v[j];
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acc += (x0 - 8)*y0 + (x1 - 8)*y1;
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}
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sum[ith] += acc*d;
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}
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// accumulate the sum from all threads in the threadgroup
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = nth/2; i > 0; i /= 2) {
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if (ith < i) {
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sum[ith] += sum[ith + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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if (ith == 0) {
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dst[r1*ne0 + r0] = sum[0];
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}
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}
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kernel void kernel_mul_mat_f16_f32(
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device const char * src0,
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device const char * src1,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant int64_t & ne10,
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constant int64_t & ne11,
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constant uint64_t & nb10,
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constant uint64_t & nb11,
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constant uint64_t & nb12,
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constant int64_t & ne0,
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constant int64_t & ne1,
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threadgroup float * sum [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpig[[thread_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 tptg[[threads_per_threadgroup]]) {
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const int64_t r0 = tgpig.x;
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const int64_t r1 = tgpig.y;
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const int64_t im = tgpig.z;
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device const half * x = (device const half *) (src0 + r0*nb01 + im*nb02);
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device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
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sum[tpitg.x] = 0.0f;
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for (int i = tpitg.x; i < ne00; i += tptg.x) {
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sum[tpitg.x] += (float) x[i] * (float) y[i];
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}
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// accumulate the sum from all threads in the threadgroup
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threadgroup_barrier(mem_flags::mem_threadgroup);
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for (uint i = tptg.x/2; i > 0; i /= 2) {
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if (tpitg.x < i) {
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sum[tpitg.x] += sum[tpitg.x + i];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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if (tpitg.x == 0) {
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dst[im*ne1*ne0 + r1*ne0 + r0] = sum[0];
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}
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}
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kernel void kernel_rope(
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device const void * src0,
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device float * dst,
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constant int64_t & ne00,
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constant int64_t & ne01,
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constant int64_t & ne02,
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constant int64_t & ne03,
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constant uint64_t & nb00,
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constant uint64_t & nb01,
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constant uint64_t & nb02,
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constant uint64_t & nb03,
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constant int64_t & ne0,
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constant int64_t & ne1,
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constant int64_t & ne2,
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constant int64_t & ne3,
|
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constant uint64_t & nb0,
|
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constant uint64_t & nb1,
|
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constant uint64_t & nb2,
|
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constant uint64_t & nb3,
|
|
|
|
constant int & n_past,
|
|
|
|
constant int & n_dims,
|
|
|
|
constant int & mode,
|
|
|
|
uint3 tpig[[thread_position_in_grid]]) {
|
|
|
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const int64_t i3 = tpig[2];
|
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|
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const int64_t i2 = tpig[1];
|
|
|
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const int64_t i1 = tpig[0];
|
|
|
|
|
|
|
|
const bool is_neox = mode & 2;
|
|
|
|
const float theta_scale = pow(10000.0, -2.0f/n_dims);
|
|
|
|
|
|
|
|
const int64_t p = ((mode & 1) == 0 ? n_past + i2 : i2);
|
|
|
|
|
|
|
|
float theta = (float)p;
|
|
|
|
|
|
|
|
if (!is_neox) {
|
|
|
|
for (int64_t i0 = 0; i0 < ne0; i0 += 2) {
|
|
|
|
const float cos_theta = cos(theta);
|
|
|
|
const float sin_theta = sin(theta);
|
|
|
|
|
|
|
|
theta *= theta_scale;
|
|
|
|
|
|
|
|
device const float * const src = (device float *)((device char *) src0 + i3*nb03 + i2*nb02 + i1*nb01 + i0*nb00);
|
|
|
|
device float * dst_data = (device float *)((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
|
|
|
|
|
|
|
|
const float x0 = src[0];
|
|
|
|
const float x1 = src[1];
|
|
|
|
|
|
|
|
dst_data[0] = x0*cos_theta - x1*sin_theta;
|
|
|
|
dst_data[1] = x0*sin_theta + x1*cos_theta;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// TODO: implement
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
kernel void kernel_cpy_f32_f16(
|
|
|
|
device const float * src0,
|
|
|
|
device half * dst,
|
|
|
|
constant int64_t & ne00,
|
|
|
|
constant int64_t & ne01,
|
|
|
|
constant int64_t & ne02,
|
|
|
|
constant int64_t & ne03,
|
|
|
|
constant uint64_t & nb00,
|
|
|
|
constant uint64_t & nb01,
|
|
|
|
constant uint64_t & nb02,
|
|
|
|
constant uint64_t & nb03,
|
|
|
|
constant int64_t & ne0,
|
|
|
|
constant int64_t & ne1,
|
|
|
|
constant int64_t & ne2,
|
|
|
|
constant int64_t & ne3,
|
|
|
|
constant uint64_t & nb0,
|
|
|
|
constant uint64_t & nb1,
|
|
|
|
constant uint64_t & nb2,
|
|
|
|
constant uint64_t & nb3,
|
|
|
|
uint3 tgpig[[threadgroup_position_in_grid]],
|
|
|
|
uint3 tpitg[[thread_position_in_threadgroup]],
|
|
|
|
uint3 ntg[[threads_per_threadgroup]]) {
|
|
|
|
const int64_t i03 = tgpig[2];
|
|
|
|
const int64_t i02 = tgpig[1];
|
|
|
|
const int64_t i01 = tgpig[0];
|
|
|
|
|
|
|
|
const int64_t n = i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
|
|
|
|
|
|
|
|
const int64_t i3 = n / (ne2*ne1*ne0);
|
|
|
|
const int64_t i2 = (n - i3*ne2*ne1*ne0) / (ne1*ne0);
|
|
|
|
const int64_t i1 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0) / ne0;
|
|
|
|
const int64_t i0 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0 - i1*ne0);
|
|
|
|
|
|
|
|
device half * dst_data = (device half *) ((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
|
|
|
|
|
|
|
|
for (int64_t i00 = tpitg.x; i00 < ne00; i00 += ntg.x) {
|
|
|
|
device const float * src = (device float *)((device char *) src0 + i03*nb03 + i02*nb02 + i01*nb01 + i00*nb00);
|
|
|
|
|
|
|
|
dst_data[i00] = src[0];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
kernel void kernel_cpy_f32_f32(
|
|
|
|
device const float * src0,
|
|
|
|
device float * dst,
|
|
|
|
constant int64_t & ne00,
|
|
|
|
constant int64_t & ne01,
|
|
|
|
constant int64_t & ne02,
|
|
|
|
constant int64_t & ne03,
|
|
|
|
constant uint64_t & nb00,
|
|
|
|
constant uint64_t & nb01,
|
|
|
|
constant uint64_t & nb02,
|
|
|
|
constant uint64_t & nb03,
|
|
|
|
constant int64_t & ne0,
|
|
|
|
constant int64_t & ne1,
|
|
|
|
constant int64_t & ne2,
|
|
|
|
constant int64_t & ne3,
|
|
|
|
constant uint64_t & nb0,
|
|
|
|
constant uint64_t & nb1,
|
|
|
|
constant uint64_t & nb2,
|
|
|
|
constant uint64_t & nb3,
|
|
|
|
uint3 tgpig[[threadgroup_position_in_grid]],
|
|
|
|
uint3 tpitg[[thread_position_in_threadgroup]],
|
|
|
|
uint3 ntg[[threads_per_threadgroup]]) {
|
|
|
|
const int64_t i03 = tgpig[2];
|
|
|
|
const int64_t i02 = tgpig[1];
|
|
|
|
const int64_t i01 = tgpig[0];
|
|
|
|
|
|
|
|
const int64_t n = i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
|
|
|
|
|
|
|
|
const int64_t i3 = n / (ne2*ne1*ne0);
|
|
|
|
const int64_t i2 = (n - i3*ne2*ne1*ne0) / (ne1*ne0);
|
|
|
|
const int64_t i1 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0) / ne0;
|
|
|
|
const int64_t i0 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0 - i1*ne0);
|
|
|
|
|
|
|
|
device float * dst_data = (device float *) ((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
|
|
|
|
|
|
|
|
for (int64_t i00 = tpitg.x; i00 < ne00; i00 += ntg.x) {
|
|
|
|
device const float * src = (device float *)((device char *) src0 + i03*nb03 + i02*nb02 + i01*nb01 + i00*nb00);
|
|
|
|
|
|
|
|
dst_data[i00] = src[0];
|
|
|
|
}
|
|
|
|
}
|